AMD-Xilinx recently open-sourced their LLVM-based Nanotube compiler. According to the introduction, the AMD-Xilinx Nanotube compiler takes eBPF XDP C code and builds on top of the LLVM compiler stack, which can then generate a packet processing pipeline in HLS C++ that can run on Xilinx FPGAs.
Nanotube is a collection of compiler channels, libraries and APIs to facilitate the execution of EBPF XDP and similar networking code on SmartNIC’s FPGA. The compiler takes as input EBPF XDP C code and outputs a packet processing pipeline in HLS C++. This HLS C++ code can then be synthesized using Vitis HLS and placed on the FPGA.
The compiler does various transformations on the program; starting with converting EBPF calls to calls to functions like the Nanotube API. It then performs multiple stages of code transformation structurally and at different API levels:
- mem2req: converts C-style pointer accesses (loads and stores) to explicit accesses to map and packet data
- optreq: coalesce adjacent map/packet accesses into fewer broad accesses
- converge: straighten out the control flow graph around Nanotube API calls
- pipeline: splits a single packet processing function into multiple coarse-grained pipeline stages, and changes application logic to process flow-through packet words rather than flat packet representations in memory
- hls: Create HLS C++ code from LLVM IR for Vitis HLS synthesis
The Nanotube library implements packet access and mapping in a synthesis-friendly implementation, which means it will be placed in the application and will create efficient hardware in high-level synthesis.
Additionally, as part of the Nanotube compiler repository, there is a library of example code developed by Facebook/Meta. This example is called “Katran” and is a high performance layer 4 network load balancer running on a Xilinx FPGA. This example demonstrating the Nanotube compiler is eBPF GPLv2 licensed code.
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